HPC-Enabled Path to Using, Scaling and Operating QC

Quantum Computing (QC) is frequently portrayed as a future accelerator for High-Performance Computing (HPC) systems, promising breakthroughs in areas such as materials science, optimisation, and cryptography. However, while scalable quantum hardware remains under active development, HPC already plays a crucial enabling role across the quantum computing stack. This panel explores how HPC infrastructures, algorithms, and software ecosystems are becoming indispensable for developing, operating, and integrating emerging quantum technologies.

Panelists will discuss the bidirectional relationship between QC and HPC, highlighting how classical supercomputing resources support the design, validation, and operation of quantum systems. A key theme is software-based emulation of quantum processors, which relies on large-scale HPC resources to simulate quantum circuits, validate algorithms, and benchmark emerging hardware architectures. Such emulation environments are essential for testing quantum algorithms and developing toolchains before large-scale quantum devices become available.

Another central topic is the scheduling and orchestration of hybrid HPC-QC workloads, where classical and quantum tasks interact in tightly coupled workflows. Efficient scheduling strategies will be required to integrate quantum processors into HPC facilities while balancing latency, resource utilization, and workflow dependencies.

The panel will also examine quantum control electronics and real-time processing, where classical compute platforms support calibration, signal processing, and feedback loops required for operating quantum devices. Additionally, experts will address the growing computational demands of Quantum Error Correction (QEC), particularly the design and deployment of high-performance decoders capable of processing large volumes of syndrome data in real time.

Finally, the discussion will cover advances in quantum algorithm synthesis and quantum circuit compilation, areas where HPC is essential for optimizing circuits, mapping them to hardware constraints, and exploring large design spaces.

By bringing together experts across hardware, systems, and software, this panel aims to clarify how HPC is not only a future beneficiary of quantum acceleration but already a foundational technology driving progress towards practical quantum computing.