DARE - Digital Autonomy with RISC-V in Europe
Wednesday, June 24, 2026 3:45 PM to 5:15 PM · 1 hr. 30 min. (Europe/Berlin)
Foyer D-G - 2nd Floor
Project Poster
AI Applications powered by HPC TechnologiesEmerging Computing TechnologiesExtreme-scale SystemsHeterogeneous System ArchitecturesHPC Simulations enhanced by Machine Learning
Information
Poster is on display.
The DARE SGA1 project poster will includes two key sections.
1) Project overview:
DARE SGA 1 (Digital Autonomy with RISC-V in Europe) is a large-scale European Supercomputing project. DARE SGA1 aims to develop prototype HPC and AI systems based on EU-designed and developed industry-standard chiplets, using the latest silicon technology nodes to achieve the highest performance and energy efficiency.
Started in March 2025, DARE SGA1 unites 38 leading partners, and 7 affiliated entities, from across Europe to develop next-generation European processors and computing systems, including an optimized software ecosystem, designed for research and industry applications. With a first phase budget of €240 million, this ambitious three-year project marks the first phase of a six year DARE initiative. DARE SGA1 is set to build a fully European supercomputing hardware (HW)/software (SW) stack for HPC and AI, featuring high-performance and energy-efficient processors designed and developed in Europe.
2) Introduction of Technical areas
Three RISC-V -based chiplets
• Vector accelerator (VEC)
• AI Processing Unit (AIPU)
• General-purpose processor (GPP)
Applications and software stack
Integration and prototyping
Contributors:
The DARE SGA1 project poster will includes two key sections.
1) Project overview:
DARE SGA 1 (Digital Autonomy with RISC-V in Europe) is a large-scale European Supercomputing project. DARE SGA1 aims to develop prototype HPC and AI systems based on EU-designed and developed industry-standard chiplets, using the latest silicon technology nodes to achieve the highest performance and energy efficiency.
Started in March 2025, DARE SGA1 unites 38 leading partners, and 7 affiliated entities, from across Europe to develop next-generation European processors and computing systems, including an optimized software ecosystem, designed for research and industry applications. With a first phase budget of €240 million, this ambitious three-year project marks the first phase of a six year DARE initiative. DARE SGA1 is set to build a fully European supercomputing hardware (HW)/software (SW) stack for HPC and AI, featuring high-performance and energy-efficient processors designed and developed in Europe.
2) Introduction of Technical areas
Three RISC-V -based chiplets
• Vector accelerator (VEC)
• AI Processing Unit (AIPU)
• General-purpose processor (GPP)
Applications and software stack
Integration and prototyping
Contributors:
Format
on-demandon-site
