Quantum Computing in Supercomputing: A Complex Multimodal Challenge

Integration of quantum hardware represents a promising trajectory for next-generation HPC. As the community begins to demonstrate early instances of fault-tolerant quantum computing (FTQC), classical HPC resources are emerging as essential components in the development of useful quantum-computing (QC) systems. However, integration is a complex multimodal challenge, involving hardware, software, middleware and applications design. This BoF will bring together practitioners and researchers from QC, HPC, and AI to discuss recent developments in HPC-quantum integration across the hardware-software stack, as well as novel co-design strategies. The focus of the BoF is pragmatic, centering on information allowing supercomputing centers and quantum hardware builders to begin integrating their systems today.

The realization of utility-scale QC requires deep integration of quantum processors within existing supercomputers and future systems. This integration presents significant challenges. Architecting low-latency, high-throughput communication between quantum processing units (QPUs) and classical resources is essential for executing critical workflows like quantum error correction and dynamic control. This deep coupling requires a co-design approach to system architecture and software. This BoF aims to bring together the HPC and QC communities to foster discussion on addressing the hardware, software and algorithmic challenges such integrations face. Moreover, the BoF will raise awareness of existing integration multi-modal efforts and share insights into designing future scalable quantum–classical systems.

Hardware challenges concern the design of tightly coupled HPC–quantum systems. Co-locating quantum and classical resources within the same hardware node is essential for the low-latency communication and tight synchronization required, for example, during real-time quantum error decoding. This is particularly difficult given the diversity of quantum modalities and their distinct physical and operational constraints. Achieving high-bandwidth, low-latency integration requires architectural innovations to connect quantum processors with CPUs, GPUs, and FPGAs, leveraging shared system resources such as memory, cache, and high-speed interconnects. This BoF invites discussion on practical approaches to physically integrating different types of quantum devices with classical system resources within existing and future HPC infrastructures, and their implications on hybrid-workflows execution and orchestration.

Software challenges involve creating an open, unified, seamless software stack enabling the efficient orchestration of quantum and classical components. The HPC software ecosystem has evolved over decades, and quantum integration will be built on this foundation. However, new solutions are needed to support quantum-aware process scheduling, control interfaces, and low-latency networking between quantum and classical processors. Contributions exploring extensions to existing runtime systems, job
schedulers, and communication frameworks for quantum-classical workloads are of high relevance to this BoF.

Algorithmic challenges lie in developing quantum algorithms designed for hybrid HPC–FTQC platforms. Most current quantum algorithms target either NISQ-era systems with smaller numbers of noisy qubits, or future fault-tolerant devices with millions of logical qubits. There is a significant gap in algorithms tailored to the intermediate regime, where a small number of logical qubits coexist with HPC. Such algorithms must leverage distributed quantum and classical resources and may require novel co-design approaches, potentially leveraging the use of AI. This BoF will elicit discussions on how to formulate, optimize, and execute such algorithms in near-future hybrid HPC-quantum settings.

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Organizers:

• Luigi Iapichino
• Stefano Mensa