

The Second International Workshop on Foundational Large Language Models Advances for HPC
Friday, June 26, 2026 9:00 AM to 1:00 PM · 4 hr. (Europe/Berlin)
Hall X4 - 1st Floor
Workshop
Large Language Models and Generative AI in HPC
Information
Since their development and release, modern Large Language Models (LLMs), such as the Generative Pre-trained Transformer (GPT) model and the Large Language Model Meta AI (LLaMA), have come to signify a revolution in human-computer interaction spurred on by their high-quality results. LLMs have repaved this landscape thanks to unprecedented investments and enormous training models (hundreds of billions of parameters). The availability of LLMs has led to increasing interest in how they could be applied to a large variety of applications. The HPC community made recent research efforts to evaluate current LLM capabilities for some HPC tasks, including code generation, auto parallelization, performance portability, correctness, among others. All these studies concluded that state-of-the-art LLM capabilities have proven so far insufficient for these targets. Hence, it is necessary to explore novel techniques to further empower LLMs to enrich the HPC mission and its impact.
This workshop objectives are focused on LLMs advances for any HPC major priority and challenge with the aims to define and discuss the fundamentals of LLMs for HPC-specific tasks, including but not limited to hardware design, compilation, parallel programming models and runtimes, application development, enabling LLM technologies to have more autonomous decision-making about the efficient use of HPC.
This workshop aims to provide a forum to discuss new and emerging solutions to address these important challenges towards an AI-assisted HPC era. Papers are being sought on many aspects of LLM for HPC targets including (but not limited to):
LLMs for Programming Environments and Runtime Systems
LLMs for HPC and Scientific Applications
LLMs for Hardware design (including non-von Neumann Architectures)
Reliability/Benchmarking/Measurements for LLMs
Organizers:
This workshop objectives are focused on LLMs advances for any HPC major priority and challenge with the aims to define and discuss the fundamentals of LLMs for HPC-specific tasks, including but not limited to hardware design, compilation, parallel programming models and runtimes, application development, enabling LLM technologies to have more autonomous decision-making about the efficient use of HPC.
This workshop aims to provide a forum to discuss new and emerging solutions to address these important challenges towards an AI-assisted HPC era. Papers are being sought on many aspects of LLM for HPC targets including (but not limited to):
LLMs for Programming Environments and Runtime Systems
LLMs for HPC and Scientific Applications
LLMs for Hardware design (including non-von Neumann Architectures)
Reliability/Benchmarking/Measurements for LLMs
Organizers:
Format
on-site
Targeted Audience
This workshop targets a very broad audience including students, researchers, professionals in industry and academia.
Beginner Level
25%
Intermediate Level
50%
Advanced Level
25%
Speakers

Pedro Valero-Lara
Senior Computer ScientistOak Ridge National Laboratory
Simon Garcia de Gonzalo
Senior Member of Technical StaffSandia National LaboratoryUS
Upasana Sridhar
Research StudentCarnegie Mellon UniversityTM
Thibault Marzlin
Computer ScientistCERFACSMN
Mahesh Natarajan
Computer ScientistLawrence Berkeley National Laboratory
Ignacio Laguna
Computer ScientistLawerence Livermore National LaboratorySM
Shinobu Miwa
Computer ScientistThe University of Electro-CommunicationsRM
Rio Mikasa
Computer ScientistNagoya UniversityJS
Jean Sexton
Computer ScientistLawrence Berkeley National LaboratoryTP
Thang Pham
Computer ScientistArgonne National Laboratory
