Leveraging SmartNICs for HPC Applications

The past few years have witnessed an increased support for programmable network adapters, known as "SmartNICs", which offer additional functionalities beyond standard packet processing capabilities. These devices often feature lightweight, programmable processing cores, FPGAs, and even CPU- and GPU-based platforms capable of running separate operating systems. Their primary target has been data center operations, such as infrastructure management, packet filtering, and I/O acceleration, but these devices are increasingly being explored for high-performance computing (HPC) application acceleration.

This tutorial offers an in-depth exploration of the state-of-the-art for SmartNICs and the emerging software ecosystems supporting them. Attendees will participate in hands-on exercises to better understand how to take advantage of SmartNICs for application acceleration, including MPI collective operation offloading, OpenMP offloading, system security, file I/O, and algorithmic modifications to maximize on-board processing power. Participants will have the opportunity to execute these exercises using cutting-edge SmartNICs such as NVIDIA's BlueField-3 Data Processing Unit (DPU). The presenters will discuss additional techniques for optimizing applications to harness SmartNICs as communication accelerators in HPC systems.